Resumo

DEL TORO HERNANDEZ, Ernesto; CABRERA SARMIENTO, Alejandro J.; SANCHEZ SOLANO, Santiago  e  CABRERA ALDAYA, Alejandro. Cache memory impact on face detection algorithm speed up in embedded systems. EAC [online]. 2012, vol.33, n.2, pp. 57-71. ISSN 1815-5928.

The impact of cache memory over the speed up of Viola-Jones face detection algorithm on a FPGA embedded processing system based in Microblaze processor is analyzed in this paper. The Viola-Jones face detection algorithm is exposed and its software implementation is described, analyzing its main functions and data locality. The impact of size (among 2 and 16 kB) and line-length (between 4 and 8 words) of code and data cache memories are analyzed. Using a Spartan3A Starter Kit board, based on XC3S700A Spartan3A FPGA, with Microblaze processor running at 62,5 MHz and 64MB of DDR2 external memory running at 125 MHz, code cache shows a higher impact than data cache, with optimal values of 8kB for code cache and among 4 to 16kB for data cache. A speed-up of 17 times over external memory execution of the algorithm is achieved with these cache memories sizes. Cache line-length has little influence over the speed up of the algorithm.

Palavras-chave : algorithm speed up; cache memory; face detection; FPGA; microblaze; viola-jones.

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