Abstract

GUILLEN SORIANO, Camilo; MARCOS ROJAS, Carlos Luis  and  CHAVEZ FERRY, Nelson. Storage System Variants for a Radar Detector in the Moments Space. EAC [online]. 2017, vol.38, n.2, pp. 65-71. ISSN 1815-5928.

Radar detectors with decision making in the moments space (DRACEC method), require sampling the signals parameters from the scanned region and storing these samples taking into account the resolution cell that originated them. The present article proposes an FPGA implementation of two variants for the storage system, each one of this guarantees precise identification of the cell that corresponds to a certain set of samples. The first variant is based on sequential digital system that control a static RAM, while the second uses a microprocessor in conjunction with internal RAM in the FPGA. The developed systems allow orderly samples storage as required for later stages of radar detectors using the DRACEC method.

Keywords : FPGA; RAM memory; DRACEC method.

        · abstract in Spanish     · text in Spanish     · Spanish ( pdf )