Abstract

CABALLERO HERNANDEZ, José Abiel; DIAZ SALAZAR, Martha; MORADILLOS PAZ-LAGO, Meyli  and  PAVONI OLIVER, Sonnia. Implementation of the logarithmic sigmoid function on a FPGA. EAC [online]. 2014, vol.35, n.2, pp. 35-44. ISSN 1815-5928.

The logarithmic sigmoid function is the most commonly used activation function of the neurons forming an artificial neural network. Digital implementation of neural networks on FPGA must be efficient, especially in the elements estimation area. A direct hardware synthesis of the mathematics expression of logarithmic sigmoid activation function is not practical, because division and exponential estimation are demanding operations, which require excessive logic and convergence is slow. Therefore, some mathematics approximations have been developed to make easier this implementation. This study shows the synthesis of a logarithmic sigmoid function for a Xilinx´s FPGA Spartan-3 utilizing a piecewise first-order linear approximation method, a piecewise second-order linear approximation method, and a look-up table method. For each design was used MatLab's Simulink tool and the System Generator tool from Xilinx ISE Design Suit 12.4 program, at a Xilinx´s specifics blocks level. It is concluded that the best performance is achieved by the piecewise first-order linear approximation with input data format fixed point with 12 bits of integer bits and 8 bits of fractional bits.

Keywords : logarithmic sigmoid function; FPGA; system generator.

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